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DSP56002PV80 数据表 (PDF) - Motorola, Inc

DSP56002PV80 Datasheet PDF - Motorola, Inc
部件名 DSP56002PV80
下载  DSP56002PV80 下载

文件大小   716.05 Kbytes
  110 Pages
制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc
功能描述 24-BIT DIGITAL SIGNAL PROCESSOR

DSP56002PV80 Datasheet (PDF)

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DSP56002PV80 Datasheet PDF - Motorola, Inc

部件名 DSP56002PV80
下载  DSP56002PV80 Click to download

文件大小   716.05 Kbytes
  110 Pages
制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc
功能描述 24-BIT DIGITAL SIGNAL PROCESSOR

DSP56002PV80 数据表 (HTML) - Motorola, Inc

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DSP56002PV80 产品详情

The DSP56002 and the DSP56L002 are MPU-style general purpose Digital Signal Processors (DSPs), composed of an efficient 24-bit digital signal processor core, program and data memories, various peripherals, and support circuitry.

DSP56002/L002 Features
Digital Signal Processing Core
• Efficient, object code compatible, 24-bit 56000-Family DSP engine
    — Up to 33 Million Instructions Per Second (MIPS) – 30.3 ns instruction cycle at 66 MHz
    — Up to 198 Million Operations Per Second (MOPS) at 66 MHz
    — Performs a 1024-point complex Fast Fourier Transform (FFT) in 59,898 clocks
    — Highly parallel instruction set with unique DSP addressing modes
    — Two 56-bit accumulators including extension byte
    — Parallel 24 × 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles)
    — Double precision 48 × 48-bit multiply with 96-bit result in 6 instruction cycles
    — 56-bit Addition/Subtraction in 1 instruction cycle
    — Fractional and integer arithmetic with support for multiprecision arithmetic
    — Hardware support for block-floating point FFT
    — Hardware nested DO loops
    — Zero-overhead fast interrupts (2 instruction cycles)
    — Four 24-bit internal data buses and three 16-bit internal address buses for maximum information transfer on-chip

Memory
• On-chip Harvard architecture permitting simultaneous accesses to program and two data memories
• 512 × 24-bit on-chip program RAM and 64 × 24-bit bootstrap ROM
• Two 256 × 24-bit on-chip data RAMs
• Two 256 × 24-bit on-chip data ROMs containing sine, A-law and µ-law tables
• External memory expansion with 16-bit address and 24-bit data buses
• Bootstrap loading from external data bus, Host Interface, or Serial Communications Interface

Peripheral and Support Circuits
• Byte-wide Host Interface (HI) with direct memory access support
• Synchronous Serial Interface (SSI) to communicate with codecs and synchronous serial devices
    — Up to 32 software-selectable time slots in network mode
• Serial Communication Interface (SCI) for full-duplex asynchronous communications
• 24-bit Timer/Event Counter also generates and measures digital waveforms
• On-chip peripheral registers memory mapped in data memory space
• Double buffered peripherals
• Up to 25 general purpose I/O (GPIO) pins
• Three external interrupt request pins; one non-maskable
• On-Chip Emulation (OnCE) port for unobtrusive, processor speed-independent debugging
• Software-programmable, Phase-Locked Loop-based (PLL) frequency synthesizer for the core clock
• Power-saving Wait and Stop modes
• Fully static, HCMOS design for operating frequencies from 66 MHz or 40 MHz down to DC
• 132-pin Ceramic Pin Grid Array (PGA) package; 13 × 13 array
• 132-pin Plastic Quad Flat Pack (PQFP) surface-mount package; 24 × 24 × 4 mm
• 144-pin Thin Quad Flat Pack (TQFP) surface-mount package; 20 × 20 × 1.4 mm
• 3.3 V (DSP56L002) and 5 V (DSP56002) Power supply options




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关于 Motorola, Inc


摩托罗拉公司(Motorola,Inc。)是一家美国跨国电信公司,成立于1928年。它的总部位于伊利诺伊州的Schaumburg,是手机,电信设备和半导体的最大的提供商之一。在整个历史上,摩托罗拉以其在电信领域的创新而闻名,包括开发世界上第一个商业上可用的蜂窝电话,Dynatac,以及世界上第一个双向Pager PageBoy。

2011年,摩托罗拉分为两家单独的公司:摩托罗拉移动性和摩托罗拉解决方案。摩托罗拉的移动性后来被Google于2012年收购,现在是联想的子公司。摩托罗拉解决方案侧重于公共安全,商业和工业通信解决方案。该公司提供广泛的产品,包括双向收音机,移动计算设备和网络基础架构设备。

摩托罗拉是手机行业的先驱之一,拥有创新和技术进步的悠久历史。该公司的遗产继续通过其子公司,其技术和产品继续在世界范围内使用。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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