[Altera Corporation] Functional Description With SRAM-based devices, configuration data must be reloaded each time the system initializes, or when new configuration data is needed. Altera configuration devices store configuration data for SRAM-based APEX II, APEX 20K, Mercury, ACEX, and FLEX devices. Table 1 lists Altera configuration devices. Features ■ Serial device family for configuring APEXTM II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), MercuryTM, ACEX® 1K, and FLEX® (FLEX 6000, FLEX 10KE, and FLEX 10KA) devices ■ Easy-to-use 4-pin interface to APEX II, APEX 20K, Mercury, ACEX, and FLEX devices ■ Low current during configuration and near-zero standby current ■ 5.0-V and 3.3-V operation ■ Software design support with the Altera® Quartus® II and MAX+PLUS® II development systems for Windows-based PCs as well as Sun SPARCstation, and HP 9000 Series 700/800 ■ Programming support with Altera’s Master Programming Unit (MPU) and programming hardware from Data I/O, BP Microsystems, and other manufacturers ■ Available in compact plastic packages (see Figures 1 and 2) – 8-pin plastic dual in-line package (PDIP) – 20-pin plastic J-lead chip carrier (PLCC) package – 32-pin plastic thin quad flat pack (TQFP) package – 100-pin plastic thin quad flat pack (TQPF) package – 88-pin Ultra FineLine BGATM package ■ EPC2 device has reprogrammable Flash configuration memory – 5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface – Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1 – ISP circuitry is compatible with IEEE Std. 1532 for EPC2 configuration device – Supports programming through Serial Vector Format Files (.svf), JamTM Standard Test and Programming Language (STAPL) Files (.jam), Jam STAPL Byte-Code Files (.jbc), and the MAX+PLUS II software via the MasterBlasterTM, ByteBlasterMVTM, or BitBlasterTM download cable – nINIT_CONF pin allows a JTAG instruction to initiate device configuration – Can be programmed with Programmer Object Files (.pof) for EPC1 and EPC1441 devices – Available in 20-pin PLCC and 32-pin TQFP packages ■ EPC4, EPC8, and EPC16 configuration devices have reprogrammable Flash configuration memory with density up to 16,000,000 or 32,000,000 bits with compression feature in these devices.
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