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EP1S10B1508I5ES 数据表 (PDF) - Altera Corporation

EP1S10B1508I5ES Datasheet PDF - Altera Corporation
部件名 EP1S10B1508I5ES
下载  EP1S10B1508I5ES 下载

文件大小   3559.39 Kbytes
  290 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Stratix Device Family Data Sheet

EP1S10B1508I5ES Datasheet (PDF)

Go To PDF Page 下载 数据表
EP1S10B1508I5ES Datasheet PDF - Altera Corporation

部件名 EP1S10B1508I5ES
下载  EP1S10B1508I5ES Click to download

文件大小   3559.39 Kbytes
  290 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Stratix Device Family Data Sheet

EP1S10B1508I5ES 数据表 (HTML) - Altera Corporation

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EP1S10B1508I5ES 产品详情

This datasheet describes configuration devices for SRAM-based look-up table (LUT) devices.



Features

Configuration devices for SRAM-based LUT devices offer the following features:

■ Configures Altera ACEX 1K, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K (including FLEX 10KE and FLEX 10KA) Mercury, Stratix, Stratix GX, Stratix II, and Stratix II GX devices

■ Easy-to-use four-pin interface

■ Low current during configuration and near-zero standby mode current

■ Programming support with the Altera Programming Unit (APU) and programming hardware from Data I/O, BP Microsystems, and other third-party programmers

■ Available in compact plastic packages

■ 8-pin plastic dual in-line (PDIP) package

■ 20-pin plastic J-lead chip carrier (PLCC) package

■ 32-pin plastic thin quad flat pack (TQFP) package

■ EPC2 device has reprogrammable flash configuration memory

■ 5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std.

1149.1 JTAG interface

■ Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1

■ Supports programming through Serial Vector Format File (.svf), Jam Standard Test and Programming Language (STAPL) Format File (.jam), JAM Byte Code File (.jbc), and the Quartus II and MAX+PLUS II softwares using the USB-Blaster, MasterBlaster, ByteBlaster II, EthernetBlaster, or ByteBlasterMV download cable

■ Supports programming through Programmer Object File (.pof) for EPC1 and EPC1441 devices

■ nINIT_CONF pin allows INIT_CONF JTAG instruction to begin FPGA configuration



 




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关于 Altera Corporation


Altera Corporation是美国可编程逻辑设备(PLD)的美国制造商,可重新配置的复杂数字电路。它是在2015年被英特尔公司收购的,现在是英特尔的子公司。

Altera成立于1983年,是可编程逻辑领域中的先驱之一,提供了一系列PLD产品,包括现场可编程的门阵列(FPGA),复杂的可编程逻辑设备(CPLD)和用于数字信号处理和内存的专业芯片接口功能。该公司的产品用于多种应用,包括通信系统,工业自动化,医疗设备和军事系统。

Altera以其在PLD市场的创新而闻名,包括发展高密度FPGA和低功率,高性能CPLD。随着英特尔的收购,Altera继续为其客户提供PLD解决方案,利用世界上最大的技术公司之一的资源和技术。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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