■ DESCRIPTION MB90860E-series with Flash ROM is especially designed for automotive and other industrial applications. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip Flash ROM program memory up to 512 Kbytes. The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock. The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free running timers. 4 UARTs constitute additional functionality for communication purposes. ■ FEATURES • CPU • Instruction system best suited to controller • Wide choice of data types (bit, byte, word, and long word) • Wide choice of addressing modes(23 types) • Enhanced multiply-divide instructions and RETI instructions • Enhanced high-precision computing with 32-bit accumulator • Instruction system compatible with high-level language (C language) and multitask • Employing system stack pointer • Enhanced various pointer indirect instructions • Barrel shift instructions • Increased processing speed • 4-byte instruction queue • Serial interface • UART (LIN/SCI) : up to 4 channels • Equipped with full-duplex double buffer • Clock-asynchronous or clock-synchronous serial transmission is available • I2C interface* : up to 2 channels • Up to 400 Kbits/s transfer rate • Interrupt controller • Powerful interrupt function • Powerful 8-level, 34-condition interrupt feature • Up to 16 external interrupts are supported • Automatic data transfer function independent of CPU • Expanded intelligent I/O service function (EI2OS) : up to 16 channels • I/O port • General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix) • 8/10-bit A/D converter • 8/10-bit A/D converter : 24 channels • Resolution is selectable between 8-bit and 10-bit. • Activation by external trigger input is allowed. • Conversion time : 3 µs (at 24-MHz machine clock, including sampling time) • Program patch function • Timer • Time-base timer, clock timer, watchdog timer : 1 channel • 8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels • 16-bit reload timer : 4 channels • 16-bit input/output timer - 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7) - 16-bit input capture: (ICU) : 8 channels - 16-bit output compare : (OCU) : 8 channels • Variety of mode • Low power consumption (standby) mode • Sleep mode (a mode that halts CPU operating clock) • Main timer mode (time-base timer mode that is transferred from main clock mode) • PLL timer mode (time-base timer mode that is transferred from PLL clock mode) • Watch mode (a mode that operates sub clock and clock timer only) • Stop mode (a mode that stops oscillation clock and sub clock) • CPU blocking operation mode • Technology • 0.35 µm CMOS technology
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