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EPF10K130E 数据表 (PDF) - Altera Corporation

EPF10K130E Datasheet PDF - Altera Corporation
部件名 EPF10K130E
下载  EPF10K130E 下载

文件大小   1395.75 Kbytes
  100 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Embedded Programmable Logic Device

EPF10K130E Datasheet (PDF)

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EPF10K130E Datasheet PDF - Altera Corporation

部件名 EPF10K130E
下载  EPF10K130E Click to download

文件大小   1395.75 Kbytes
  100 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Embedded Programmable Logic Device

EPF10K130E 数据表 (HTML) - Altera Corporation

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EPF10K130E 产品详情

General Description
Altera FLEX 10KE devices are enhanced versions of FLEX 10K devices. Based on reconfigurable CMOS SRAM elements, the FLEX architecture incorporates all features necessary to implement common gate array megafunctions. With up to 200,000 typical gates, FLEX 10KE devices provide the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.

Features...
■ Embedded programmable logic devices (PLDs), providing system-on-a-programmable-chip (SOPC) integration in a single device
    – Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions
    – Dual-port capability with up to 16-bit width per embedded array block (EAB)
    – Logic array for general logic functions
■ High density
    – 30,000 to 200,000 typical gates (see Tables 1 and 2)
    – Up to 98,304 RAM bits (4,096 bits per EAB), all of which can be used without reducing logic capacity
■ System-level features
    – MultiVoltTM I/O pins can drive or be driven by 2.5-V, 3.3-V, or 5.0-V devices
    – Low power consumption
    – Bidirectional I/O performance (tSU and tCO) up to 212 MHz
    – Fully compliant with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at 33 MHz or 66 MHz
    – -1 speed grade devices are compliant with PCI Local Bus Specification, Revision 2.2, for 5.0-V operation
    – Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990, available without consuming additional device logic
    – Fabricated on an advanced process and operate with a 2.5-V internal supply voltage
    – In-circuit reconfigurability (ICR) via external configuration devices, intelligent controller, or JTAG port
    – ClockLockTM and ClockBoostTM options for reduced clock delay/skew and clock multiplication
    – Built-in low-skew clock distribution trees
    – 100% functional testing of all devices; test vectors or scan chains are not required
    – Pull-up on I/O pins before and during configuration
■ Flexible interconnect
    – FastTrack® Interconnect continuous routing structure for fast, predictable interconnect delays
    – Dedicated carry chain that implements arithmetic functions such as fast adders, counters, and comparators (automatically used by software tools and megafunctions)
    – Dedicated cascade chain that implements high-speed, high-fan-in logic functions (automatically used by software tools and megafunctions)
    – Tri-state emulation that implements internal tri-state buses
    – Up to six global clock signals and four global clear signals
■ Powerful I/O pins
    – Individual tri-state output enable control for each pin
    – Open-drain option on each I/O pin
    – Programmable output slew-rate control to reduce switching noise
    – Clamp to VCCIO user-selectable on a pin-by-pin basis
    – Supports hot-socketing
■ Software design support and automatic place-and-route provided by Altera’s development systems for Windows-based PCs and Sun SPARCstation, and HP 9000 Series 700/800
■ Flexible package options
    – Available in a variety of packages with 144 to 672 pins, including the innovative FineLine BGATM packages (see Tables 3 and 4)
    – SameFrameTM pin-out compatibility between FLEX 10KA and FLEX 10KE devices across a range of device densities and pin counts
■ Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), DesignWare components, Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic




类似零件编号 - EPF10K130E

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类似说明 - EPF10K130E

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关于 Altera Corporation


Altera Corporation是美国可编程逻辑设备(PLD)的美国制造商,可重新配置的复杂数字电路。它是在2015年被英特尔公司收购的,现在是英特尔的子公司。

Altera成立于1983年,是可编程逻辑领域中的先驱之一,提供了一系列PLD产品,包括现场可编程的门阵列(FPGA),复杂的可编程逻辑设备(CPLD)和用于数字信号处理和内存的专业芯片接口功能。该公司的产品用于多种应用,包括通信系统,工业自动化,医疗设备和军事系统。

Altera以其在PLD市场的创新而闻名,包括发展高密度FPGA和低功率,高性能CPLD。随着英特尔的收购,Altera继续为其客户提供PLD解决方案,利用世界上最大的技术公司之一的资源和技术。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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