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EPC1 数据表 (PDF) - Altera Corporation

EPC1 Datasheet PDF - Altera Corporation
部件名 EPC1
下载  EPC1 下载

文件大小   467.61 Kbytes
  36 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 SRAM-Based LUT Devices

EPC1 Datasheet (PDF)

Go To PDF Page 下载 数据表
EPC1 Datasheet PDF - Altera Corporation

部件名 EPC1
下载  EPC1 Click to download

文件大小   467.61 Kbytes
  36 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 SRAM-Based LUT Devices

EPC1 数据表 (HTML) - Altera Corporation

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EPC1 产品详情

The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks, a configuration controller and a flash memory. The flash memory is used to store configuration data for systems made up of one or more Altera FPGAs. Unused portions of the flash memory can be used to store

processor code or data that can be accessed via the external flash interface after FPGA configuration is complete.



Features

■ Enhanced configuration devices include EPC4, EPC8, and EPC16 devices

■ Single-chip configuration solution for Stratix® series, Cyclone™ series, APEX™ II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), Mercury™, ACEX® 1K, and FLEX® 10K (FLEX 10KE and FLEX 10KA) devices

■ Contains 4-, 8-, and 16-Mbit flash memories for configuration data storage

● On-chip decompression feature almost doubles the effective configuration density

■ Standard flash die and a controller die combined into single stacked chip package

■ External flash interface supports parallel programming of flash and external processor access to unused portions of memory

● Flash memory block/sector protection capability via external flash interface

● Supported in EPC16 and EPC4 devices

■ Page mode support for remote and local reconfiguration with up to eight configurations for the entire system

● Compatible with Stratix series Remote System Configuration feature

■ Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data output per DCLK cycle

■ Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs

■ Pin-selectable 2-ms or 100-ms power-on reset (POR) time

■ Configuration clock supports programmable input source and frequency synthesis

● Multiple configuration clock sources supported (internal oscillator and external clock input pin)

● External clock source with frequencies up to 133 MHz

● Internal oscillator defaults to 10 MHz; Programmable for higher frequencies of 33, 50, and 66 MHz

● Clock synthesis supported via user programmable divide counter

■ Available in the 100-pin plastic quad flat pack (PQFP) and the 88-pin Ultra FineLine BGA® packages

● Vertical migration between all devices supported in the 100-pin PQFP package

■ Supply voltage of 3.3 V (core and I/O)




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关于 Altera Corporation


Altera Corporation是美国可编程逻辑设备(PLD)的美国制造商,可重新配置的复杂数字电路。它是在2015年被英特尔公司收购的,现在是英特尔的子公司。

Altera成立于1983年,是可编程逻辑领域中的先驱之一,提供了一系列PLD产品,包括现场可编程的门阵列(FPGA),复杂的可编程逻辑设备(CPLD)和用于数字信号处理和内存的专业芯片接口功能。该公司的产品用于多种应用,包括通信系统,工业自动化,医疗设备和军事系统。

Altera以其在PLD市场的创新而闻名,包括发展高密度FPGA和低功率,高性能CPLD。随着英特尔的收购,Altera继续为其客户提供PLD解决方案,利用世界上最大的技术公司之一的资源和技术。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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