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H5DU2562GFR-FAI 数据表 (PDF) - Hynix Semiconductor

H5DU2562GFR-FAI Datasheet PDF - Hynix Semiconductor
部件名 H5DU2562GFR-FAI
下载  H5DU2562GFR-FAI 下载

文件大小   500.74 Kbytes
  28 Pages
制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor
功能描述 256Mb DDR SDRAM

H5DU2562GFR-FAI Datasheet (PDF)

Go To PDF Page 下载 数据表
H5DU2562GFR-FAI Datasheet PDF - Hynix Semiconductor

部件名 H5DU2562GFR-FAI
下载  H5DU2562GFR-FAI Click to download

文件大小   500.74 Kbytes
  28 Pages
制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor
功能描述 256Mb DDR SDRAM

H5DU2562GFR-FAI 数据表 (HTML) - Hynix Semiconductor

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H5DU2562GFR-FAI 产品详情

DESCRIPTION
The H5DU2562GFR is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.
This Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.

FEATURES
• VDD, VDDQ = 2.5V +/- 0.2V
• All inputs and outputs are compatible with SSTL_2 interface
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous - data transaction aligned to bidirectional data strobe (DQS)
• x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O
• Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ)
• On chip DLL align DQ and DQS transition with CK transition
• DM mask write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
• Programmable CAS latency 2/2.5 (DDR200, 266, 333), 3 (DDR400) and 4 (DDR500) supported
• Programmable burst length 2/4/8 with both sequential and interleave mode
• Internal four bank operations with single pulsed/RAS
• Auto refresh and self refresh supported
• tRAS lock out function supported
• 8192 refresh cycles/64ms
• 60 Ball FBGA Package Type
• This product is in compliance with the directive pertaining of RoHS.




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关于 Hynix Semiconductor


Hynix Semiconductor是一家韩国公司,专门从事内存半导体的设计和制造。
该公司成立于1983年,总部位于韩国伊歇。
Hynix是世界上领先的DRAM(动态随机访问存储器)和NAND闪存的生产商之一,它们用于各种应用程序,例如计算机系统,移动设备和固态驱动器。
Hynix以其在内存半导体技术方面的专业知识以及为客户提供高质量和高性能存储产品的能力。
该公司在世界各地拥有运营和设施,并与客户紧密合作,提供满足其特定需求和需求的定制内存解决方案。
除了其内存产品外,Hynix还为汽车和数据中心市场提供了一系列产品和解决方案,例如System-A-A-Chip(SOC)产品(SOC)产品和高带宽内存(HBM)产品。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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