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EP1C4F400C8ES 数据表 (PDF) - Altera Corporation

EP1C4F400C8ES Datasheet PDF - Altera Corporation
部件名 EP1C4F400C8ES
下载  EP1C4F400C8ES 下载

文件大小   1386.83 Kbytes
  106 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Section I. Cyclone FPGA Family Data Sheet

EP1C4F400C8ES Datasheet (PDF)

Go To PDF Page 下载 数据表
EP1C4F400C8ES Datasheet PDF - Altera Corporation

部件名 EP1C4F400C8ES
下载  EP1C4F400C8ES Click to download

文件大小   1386.83 Kbytes
  106 Pages
制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation
功能描述 Section I. Cyclone FPGA Family Data Sheet

EP1C4F400C8ES 数据表 (HTML) - Altera Corporation

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EP1C4F400C8ES 产品详情

Introduction
The Cyclone® field programmable gate array family is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phase-locked loops (PLLs) for clocking and a dedicated double data rate (DDR) interface to meet DDR SDRAM and fast cycle RAM (FCRAM) memory requirements, Cyclone devices are a cost-effective solution for data-path applications. Cyclone devices support various I/O standards, including LVDS at data rates up to 640 megabits per second (Mbps), and 66- and 33-MHz, 64- and 32-bit peripheral component interconnect (PCI), for interfacing with and supporting ASSP and ASIC devices. Altera also offers new low-cost serial configuration devices to configure Cyclone devices.

Features
The Cyclone device family offers the following features:
■ 2,910 to 20,060 LEs, see Table 1–1
■ Up to 294,912 RAM bits (36,864 bytes)
■ Supports configuration through low-cost serial configuration device
■ Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards
■ Support for 66- and 33-MHz, 64- and 32-bit PCI standard
■ High-speed (640 Mbps) LVDS I/O support
■ Low-speed (311 Mbps) LVDS I/O support
■ 311-Mbps RSDS I/O support
■ Up to two PLLs per device provide clock multiplication and phase shifting
■ Up to eight global clock lines with six clock resources available per
   logic array block (LAB) row
■ Support for external memory, including DDR SDRAM (133 MHz),
   FCRAM, and single data rate (SDR) SDRAM
■ Support for multiple intellectual property (IP) cores, including
   Altera® MegaCore® functions and Altera Megafunctions Partners
   Program (AMPPSM) megafunctions.




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关于 Altera Corporation


Altera Corporation是美国可编程逻辑设备(PLD)的美国制造商,可重新配置的复杂数字电路。它是在2015年被英特尔公司收购的,现在是英特尔的子公司。

Altera成立于1983年,是可编程逻辑领域中的先驱之一,提供了一系列PLD产品,包括现场可编程的门阵列(FPGA),复杂的可编程逻辑设备(CPLD)和用于数字信号处理和内存的专业芯片接口功能。该公司的产品用于多种应用,包括通信系统,工业自动化,医疗设备和军事系统。

Altera以其在PLD市场的创新而闻名,包括发展高密度FPGA和低功率,高性能CPLD。随着英特尔的收购,Altera继续为其客户提供PLD解决方案,利用世界上最大的技术公司之一的资源和技术。

*此信息仅供一般参考,对于因上述信息造成的任何损失或损害,我们概不负责。




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